2025-10-18
This paper discusses: how the selection of test points can lead to variations in test results when performing signal integrity testing on MIPI DPHY, for reference by peers.
In MIPI DPHY applications, both DSI and CSI implementations exist. Typically, DSI is used for display purposes. The signal flow can be referenced in the diagram below: signals are output from the CPU and travel toward the display, with matching resistors incorporated along the path.
In CSI Carema applications, the signal flow is reversed. Video signals captured by the camera are sent to the CPU for processing, following the direction shown in the diagram below.
Due to these differing signal paths, selecting appropriate test points for signal quality testing with an oscilloscope requires careful consideration. For DSI testing, theoretically, test points should be as close to the display chip as possible. However, in typical system-level testing, accessing the display end is often impractical. Instead, testing the matching resistors farther from the CPU end, as illustrated below, may be a more feasible approach.
On the system-level CSI test path, the ideal test point is on the CPU pins. However, with current CPU packaging, accessing the CPU pins is challenging. A relatively easier-to-implement test point is the matching resistor near the CPU end.
Having outlined the principles for selecting test points, let’s examine an example to compare how incorrect test point selection impacts test results. This example uses DSI testing to contrast an erroneous test point (placed near the matching resistor on the CPU side) with a correct test point (placed near the matching resistor on the display side).
The following data is based on Clock using differential probing and Data using single-ended probing, with three probes used together for MIPI DPHY compliance testing.
1. Correct Test Point Report
2. Correct Test Point Eye Diagram
3. Incorrect Test Point Report
4. Incorrect Test Point Eye Diagram
The test report shows that for Data Tx Differential Voltage, the level specification requires values between 140mV and 270mV. At the incorrect test point (the signal transmitter), the measured level is approximately 280mV. At the correct test point (the signal receiver), the measured level is 200mV. This 80mV discrepancy causes the test result to clearly differ between Pass and Fail.
During MIPI testing, soldering is typically required for test point access. Soldering complexity may sometimes influence test point selection. Regardless of the choice, the fundamental approach must remain consistent. Incorrect selection wastes effort, while misplaced testing forces designers to squander resources on debugging. Such errors can even reach the client, causing customer concerns and resulting in significant losses for both the product and the company.